April 2019 Archives by author

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Starting: Mon Apr 1 00:41:56 BST 2019
Ending: Tue Apr 30 23:35:04 BST 2019
Messages: 404

• [libre-riscv-dev] TLB key for CAM   Daniel Benusovich
• [libre-riscv-dev] TLB   Daniel Benusovich
• [libre-riscv-dev] TLB   Daniel Benusovich
• [libre-riscv-dev] TLB   Daniel Benusovich
• [libre-riscv-dev] TLB   Daniel Benusovich
• [libre-riscv-dev] TLB   Daniel Benusovich
• [libre-riscv-dev] TLB   Daniel Benusovich
• [libre-riscv-dev] pinmux in nmigen   Hendrik Boom
• [libre-riscv-dev] pinmux in nmigen   Hendrik Boom
• [libre-riscv-dev] useful article on consensus   Hendrik Boom
• [libre-riscv-dev] [Bug 72] verilog to nmigen converter (full or partial) needed   Hendrik Boom
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   Hendrik Boom
• [libre-riscv-dev] pinmux in nmigen   Rishabh Jain
• [libre-riscv-dev] Fwd: Good news from the review committee!   Rishabh Jain
• [libre-riscv-dev] query in soc/TLB   Rishabh Jain
• [libre-riscv-dev] pinmux in nmigen   Rishabh Jain
• [libre-riscv-dev] pinmux in nmigen   Rishabh Jain
• [libre-riscv-dev] pinmux in nmigen   Rishabh Jain
• [libre-riscv-dev] pinmux in nmigen   Rishabh Jain
• [libre-riscv-dev] query in soc/TLB   Rishabh Jain
• [libre-riscv-dev] query in soc/TLB   Rishabh Jain
• [libre-riscv-dev] getting important: need to create the project plan, involves estimating times for tasks (and creating them)   Rishabh Jain
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Aleksandar Kostovic
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Aleksandar Kostovic
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Aleksandar Kostovic
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Aleksandar Kostovic
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Aleksandar Kostovic
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Aleksandar Kostovic
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Aleksandar Kostovic
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Aleksandar Kostovic
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Aleksandar Kostovic
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Aleksandar Kostovic
• [libre-riscv-dev] Good news from the review committee!   Aleksandar Kostovic
• [libre-riscv-dev] barrel processor as I/O and DMA controller   Aleksandar Kostovic
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Aleksandar Kostovic
• [libre-riscv-dev] https://wiki.f-si.org/index.php/The_Raven_chip:_First-time_silicon_success_with_qflow_and_efabless   Aleksandar Kostovic
• [libre-riscv-dev] getting important: need to create the project plan, involves estimating times for tasks (and creating them)   Aleksandar Kostovic
• [libre-riscv-dev] getting important: need to create the project plan, involves estimating times for tasks (and creating them)   Aleksandar Kostovic
• [libre-riscv-dev] getting important: need to create the project plan, involves estimating times for tasks (and creating them)   Aleksandar Kostovic
• [libre-riscv-dev] [Bug 43] create an IEEE754 FP "sqrt"   Aleksandar Kostovic
• [libre-riscv-dev] useful article on consensus   Aleksandar Kostovic
• [libre-riscv-dev] Vulkan trademark licensing   Luke Kenneth Casson Leighton
• [libre-riscv-dev] Vulkan trademark licensing   Luke Kenneth Casson Leighton
• [libre-riscv-dev] Fwd: Preparations The Libre-RISCV SoC   Luke Kenneth Casson Leighton
• [libre-riscv-dev] formal verification   Luke Kenneth Casson Leighton
• [libre-riscv-dev] Fwd: Preparations The Libre-RISCV SoC   Luke Kenneth Casson Leighton
• [libre-riscv-dev] simple barrel processor pipeline design diagram   Luke Kenneth Casson Leighton
• [libre-riscv-dev] need help with auto-pipeline stage creation   Luke Kenneth Casson Leighton
• [libre-riscv-dev] simple barrel processor pipeline design diagram   Luke Kenneth Casson Leighton
• [libre-riscv-dev] need help with auto-pipeline stage creation   Luke Kenneth Casson Leighton
• [libre-riscv-dev] need help with auto-pipeline stage creation   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pinmux in nmigen   Luke Kenneth Casson Leighton
• [libre-riscv-dev] need help with auto-pipeline stage creation   Luke Kenneth Casson Leighton
• [libre-riscv-dev] need help with auto-pipeline stage creation   Luke Kenneth Casson Leighton
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Luke Kenneth Casson Leighton
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Luke Kenneth Casson Leighton
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Luke Kenneth Casson Leighton
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Luke Kenneth Casson Leighton
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Luke Kenneth Casson Leighton
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Luke Kenneth Casson Leighton
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Luke Kenneth Casson Leighton
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Luke Kenneth Casson Leighton
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Luke Kenneth Casson Leighton
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline stages controlling delays   Luke Kenneth Casson Leighton
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline stages controlling delays   Luke Kenneth Casson Leighton
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline stages controlling delays   Luke Kenneth Casson Leighton
• [libre-riscv-dev] buffered pipeline   Luke Kenneth Casson Leighton
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Luke Kenneth Casson Leighton
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline stages controlling delays   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline stages controlling delays   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline stages controlling delays   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline stages controlling delays   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline stages controlling delays   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline stages controlling delays   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline stages controlling delays   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline stages controlling delays   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline stages controlling delays   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline stages controlling delays   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline stages controlling delays   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB key for CAM   Luke Kenneth Casson Leighton
• [libre-riscv-dev] Fwd: Good news from the review committee!   Luke Kenneth Casson Leighton
• [libre-riscv-dev] Good news from the review committee!   Luke Kenneth Casson Leighton
• [libre-riscv-dev] Fwd: Good news from the review committee!   Luke Kenneth Casson Leighton
• [libre-riscv-dev] kestrel kcp53000 developer making a nmigen RISC-V core   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] Good news from the review committee!   Luke Kenneth Casson Leighton
• [libre-riscv-dev] Good news from the review committee!   Luke Kenneth Casson Leighton
• [libre-riscv-dev] kestrel kcp53000 developer making a nmigen RISC-V core   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] kestrel kcp53000 developer making a nmigen RISC-V core   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB key for CAM   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] barrel processor as I/O and DMA controller   Luke Kenneth Casson Leighton
• [libre-riscv-dev] barrel processor as I/O and DMA controller   Luke Kenneth Casson Leighton
• [libre-riscv-dev] barrel processor as I/O and DMA controller   Luke Kenneth Casson Leighton
• [libre-riscv-dev] barrel processor as I/O and DMA controller   Luke Kenneth Casson Leighton
• [libre-riscv-dev] barrel processor as I/O and DMA controller   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] query in soc/TLB   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pinmux in nmigen   Luke Kenneth Casson Leighton
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Luke Kenneth Casson Leighton
• [libre-riscv-dev] signed/unsigned 2-stage 64-bit multiplier pipeline needed   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB key for CAM   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB Replacement Policy   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB Replacement Policy   Luke Kenneth Casson Leighton
• [libre-riscv-dev] signed/unsigned 2-stage 64-bit multiplier pipeline needed   Luke Kenneth Casson Leighton
• [libre-riscv-dev] signed/unsigned 2-stage 64-bit multiplier pipeline needed   Luke Kenneth Casson Leighton
• [libre-riscv-dev] Good news from the review committee!   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB Replacement Policy   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] formal verification   Luke Kenneth Casson Leighton
• [libre-riscv-dev] formal verification   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pipeline sync issues   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB Replacement Policy   Luke Kenneth Casson Leighton
• [libre-riscv-dev] Good news from the review committee!   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB Replacement Policy   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB Replacement Policy   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB Replacement Policy   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB Replacement Policy   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB   Luke Kenneth Casson Leighton
• [libre-riscv-dev] iommu   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB   Luke Kenneth Casson Leighton
• [libre-riscv-dev] Why I like Rust   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB   Luke Kenneth Casson Leighton
• [libre-riscv-dev] memory model checker   Luke Kenneth Casson Leighton
• [libre-riscv-dev] https://wiki.f-si.org/index.php/The_Raven_chip:_First-time_silicon_success_with_qflow_and_efabless   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB   Luke Kenneth Casson Leighton
• [libre-riscv-dev] TLB   Luke Kenneth Casson Leighton
• [libre-riscv-dev] https://wiki.f-si.org/index.php/The_Raven_chip:_First-time_silicon_success_with_qflow_and_efabless   Luke Kenneth Casson Leighton
• [libre-riscv-dev] getting important: need to create the project plan, involves estimating times for tasks (and creating them)   Luke Kenneth Casson Leighton
• [libre-riscv-dev] getting important: need to create the project plan, involves estimating times for tasks (and creating them)   Luke Kenneth Casson Leighton
• [libre-riscv-dev] isa dev discussion instr encodings   Luke Kenneth Casson Leighton
• [libre-riscv-dev] getting important: need to create the project plan, involves estimating times for tasks (and creating them)   Luke Kenneth Casson Leighton
• [libre-riscv-dev] getting important: need to create the project plan, involves estimating times for tasks (and creating them)   Luke Kenneth Casson Leighton
• [libre-riscv-dev] useful article on consensus   Luke Kenneth Casson Leighton
• [libre-riscv-dev] useful article on consensus   Luke Kenneth Casson Leighton
• [libre-riscv-dev] useful article on consensus   Luke Kenneth Casson Leighton
• [libre-riscv-dev] useful article on consensus   Luke Kenneth Casson Leighton
• [libre-riscv-dev] pinmux in nmigen   Luke Kenneth Casson Leighton
• [libre-riscv-dev] query in soc/TLB   Luke Kenneth Casson Leighton
• [libre-riscv-dev] getting important: need to create the project plan, involves estimating times for tasks (and creating them)   Luke Kenneth Casson Leighton
• [libre-riscv-dev] getting important: need to create the project plan, involves estimating times for tasks (and creating them)   Luke Kenneth Casson Leighton
• [libre-riscv-dev] 6600 scoreboard / OoO discussion   Luke Kenneth Casson Leighton
• [libre-riscv-dev] Queue (FIFOControl) is awesome   Luke Kenneth Casson Leighton
• [libre-riscv-dev] Interesting video interviewing Raptor Engineering   Luke Kenneth Casson Leighton
• [libre-riscv-dev] Vulkan trademark licensing   Jacob Lifshay
• [libre-riscv-dev] Fwd: Preparations The Libre-RISCV SoC   Jacob Lifshay
• [libre-riscv-dev] simple barrel processor pipeline design diagram   Jacob Lifshay
• [libre-riscv-dev] simple barrel processor pipeline design diagram   Jacob Lifshay
• [libre-riscv-dev] need help with auto-pipeline stage creation   Jacob Lifshay
• [libre-riscv-dev] need help with auto-pipeline stage creation   Jacob Lifshay
• [libre-riscv-dev] need help with auto-pipeline stage creation   Jacob Lifshay
• [libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations   Jacob Lifshay
• [libre-riscv-dev] pipeline stages controlling delays   Jacob Lifshay
• [libre-riscv-dev] pipeline stages controlling delays   Jacob Lifshay
• [libre-riscv-dev] buffered pipeline   Jacob Lifshay
• [libre-riscv-dev] pipeline stages controlling delays   Jacob Lifshay
• [libre-riscv-dev] pipeline sync issues   Jacob Lifshay
• [libre-riscv-dev] kestrel kcp53000 developer making a nmigen RISC-V core   Jacob Lifshay
• [libre-riscv-dev] pipeline sync issues   Jacob Lifshay
• [libre-riscv-dev] kestrel kcp53000 developer making a nmigen RISC-V core   Jacob Lifshay
• [libre-riscv-dev] pipeline sync issues   Jacob Lifshay
• [libre-riscv-dev] TLB key for CAM   Jacob Lifshay
• [libre-riscv-dev] pipeline sync issues   Jacob Lifshay
• [libre-riscv-dev] barrel processor as I/O and DMA controller   Jacob Lifshay
• [libre-riscv-dev] barrel processor as I/O and DMA controller   Jacob Lifshay
• [libre-riscv-dev] barrel processor as I/O and DMA controller   Jacob Lifshay
• [libre-riscv-dev] barrel processor as I/O and DMA controller   Jacob Lifshay
• [libre-riscv-dev] barrel processor as I/O and DMA controller   Jacob Lifshay
• [libre-riscv-dev] barrel processor as I/O and DMA controller   Jacob Lifshay
• [libre-riscv-dev] pipeline sync issues   Jacob Lifshay
• [libre-riscv-dev] pipeline sync issues   Jacob Lifshay
• [libre-riscv-dev] pipeline sync issues   Jacob Lifshay
• [libre-riscv-dev] pipeline sync issues   Jacob Lifshay
• [libre-riscv-dev] pipeline sync issues   Jacob Lifshay
• [libre-riscv-dev] pipeline sync issues   Jacob Lifshay
• [libre-riscv-dev] pipeline sync issues   Jacob Lifshay
• [libre-riscv-dev] query in soc/TLB   Jacob Lifshay
• [libre-riscv-dev] signed/unsigned 2-stage 64-bit multiplier pipeline needed   Jacob Lifshay
• [libre-riscv-dev] pipeline sync issues   Jacob Lifshay
• [libre-riscv-dev] pipeline sync issues   Jacob Lifshay
• [libre-riscv-dev] pipeline sync issues   Jacob Lifshay
• [libre-riscv-dev] formal verification   Jacob Lifshay
• [libre-riscv-dev] formal verification   Jacob Lifshay
• [libre-riscv-dev] Good news from the review committee!   Jacob Lifshay
• [libre-riscv-dev] TLB Replacement Policy   Jacob Lifshay
• [libre-riscv-dev] TLB   Jacob Lifshay
• [libre-riscv-dev] TLB   Jacob Lifshay
• [libre-riscv-dev] TLB   Jacob Lifshay
• [libre-riscv-dev] TLB   Jacob Lifshay
• [libre-riscv-dev] TLB   Jacob Lifshay
• [libre-riscv-dev] Why I like Rust   Jacob Lifshay
• [libre-riscv-dev] TLB   Jacob Lifshay
• [libre-riscv-dev] TLB   Jacob Lifshay
• [libre-riscv-dev] TLB   Jacob Lifshay
• [libre-riscv-dev] useful article on consensus   Jacob Lifshay
• [libre-riscv-dev] useful article on consensus   Jacob Lifshay
• [libre-riscv-dev] getting important: need to create the project plan, involves estimating times for tasks (and creating them)   Jacob Lifshay
• [libre-riscv-dev] useful article on consensus   Jacob Lifshay
• [libre-riscv-dev] Interesting video interviewing Raptor Engineering   Jacob Lifshay
• [libre-riscv-dev] [Bug 60] 3-stage 64-bit multiplier pipeline needed (signed/unsigned)   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 60] 3-stage 64-bit multiplier pipeline needed (signed/unsigned)   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 61] New: Formal Mathematical Proofs needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 61] Formal Mathematical Proofs needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 61] Formal Mathematical Proofs needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 61] Formal Mathematical Proofs needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 62] New: nmigen-based general-purpose util / data handling / io-control library needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 63] New: queue (FIFO) library routine needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] New: data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 65] New: variable-length in / variable-length out queue needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 66] New: a nmigen "Object" is needed that acts like a multiply-inheritable python class   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 66] a nmigen "Object" is needed that acts like a multiply-inheritable python class   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 66] a nmigen "Object" is needed that acts like a multiply-inheritable python class   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 67] New: FIFOControl requires "shape" function to exist in i_data   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 68] New: nmigen general utils needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 66] a nmigen "Object" is needed that acts like a multiply-inheritable python class   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 68] nmigen general utils needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 69] New: evaluate openpiton   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 70] New: evaluate Bus Architectures   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 70] evaluate Bus Architectures   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 70] evaluate Bus Architectures   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 70] evaluate Bus Architectures   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 70] evaluate Bus Architectures   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 17] IOMMU needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 71] New: replace SetAssocCache PLRU with random selection (LFSR)   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 71] replace SetAssocCache PLRU with random selection (LFSR)   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 71] replace SetAssocCache PLRU with random selection (LFSR)   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 71] replace SetAssocCache PLRU with random selection (LFSR)   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 71] replace SetAssocCache PLRU with random selection (LFSR)   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 71] replace SetAssocCache PLRU with random selection (LFSR)   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 72] New: verilog to nmigen converter (full or partial) needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 71] replace SetAssocCache PLRU with random selection (LFSR)   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 71] replace SetAssocCache PLRU with random selection (LFSR)   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 73] New: all nmigen module-based classes now need to derive from Elaboratable   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 61] Formal Mathematical Proofs needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 72] verilog to nmigen converter (full or partial) needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 72] verilog to nmigen converter (full or partial) needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 72] verilog to nmigen converter (full or partial) needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 72] verilog to nmigen converter (full or partial) needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 72] verilog to nmigen converter (full or partial) needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 72] verilog to nmigen converter (full or partial) needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 72] verilog to nmigen converter (full or partial) needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 72] verilog to nmigen converter (full or partial) needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 72] verilog to nmigen converter (full or partial) needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 71] replace SetAssocCache PLRU with random selection (LFSR)   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 43] create an IEEE754 FP "sqrt"   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 43] create an IEEE754 FP "sqrt"   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 43] create an IEEE754 FP "sqrt"   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 54] Kazan Vulkan driver operational   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 73] all nmigen module-based classes now need to derive from Elaboratable   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 72] verilog to nmigen converter (full or partial) needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 72] verilog to nmigen converter (full or partial) needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 72] verilog to nmigen converter (full or partial) needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] New: preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 43] create an IEEE754 FP "sqrt"   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 72] verilog to nmigen converter (full or partial) needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 50] nmigen pinmux   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 66] a nmigen "Object" is needed that acts like a multiply-inheritable python class   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 75] New: create an IEEE754 FP "add" pipeline   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 76] New: IEEE754 RISC-V "tininess" as well as rounding modes (odd/even) needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 77] New: IEEE754 FP "mul" needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 78] New: IEEE754 FP "div" needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 48] Complete IEEE754 floating point pipeline   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 48] Complete IEEE754 floating point pipeline   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 48] Complete IEEE754 floating point pipeline   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 54] Kazan Vulkan driver operational   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 68] nmigen general utils needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 60] N-stage 64-bit multiplier pipeline needed (signed/unsigned)   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 44] IEEE754 FPU inverse-sqrt   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 44] IEEE754 FPU inverse-sqrt   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 44] IEEE754 FPU inverse-sqrt   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 79] New: switch to using unittest package for unit testing   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 79] switch to using unittest package for unit testing   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 64] data handling / io control / data routing API needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] [Bug 61] Formal Mathematical Proofs needed   bugzilla-daemon at libre-riscv.org
• [libre-riscv-dev] TLB   lkcl

Last message date: Tue Apr 30 23:35:04 BST 2019
Archived on: Tue Apr 30 23:35:05 BST 2019

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