[libre-riscv-dev] simple barrel processor pipeline design diagram

Jacob Lifshay programmerjake at gmail.com
Wed Apr 3 06:40:48 BST 2019

I created a pipeline design diagram for the simple barrel processor I'm
creating to familiarize myself with nmigen and to possibly use as a
low-power minion core. I'm planning on it supporting RV64IMAC. It has a
5-stage pipeline, so supports 5 harts.



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