[libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT

bugzilla-daemon at libre-riscv.org bugzilla-daemon at libre-riscv.org
Tue Apr 30 11:58:23 BST 2019


--- Comment #34 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---

On Tue, Apr 30, 2019 at 10:42 AM <bugzilla-daemon at libre-riscv.org> wrote:
> http://bugs.libre-riscv.org/show_bug.cgi?id=74
> --- Comment #33 from Aleksandar Kostovic <alexandar.kostovic at gmail.com> ---
> >shock! near-total guess-work, and this works!
> YEY! Thats awesome :)
> >the call to get_mantissa() masks out the top bits... we should really
> >call "normalise" to adjust exp/mantissa...
> >
> >so quite a lot to be done, however that's the hard part.
> so now we create a function normalise or what?

rounding and normalising, yes.  rounding based on that new variable "lowbits"
being >= 2, and normalise... mmm...

             m.d.sync += z.m.eq(z.m + 1) # mantissa rounds up
            with m.If(z.m == z.m1s): # all 1s
                m.d.sync += z.e.eq(z.e + 1) # exponent rounds up

looks like we're supposed to just increment the exponent by one if the mantissa
becomes all 1s.

so just something like this:

if (lowbits >= 2):
    m += 1
    if get_mantissa(m) == ((1<<24)-1):
       e += 1

something like that.  it might be sm and se not m and e

then we can look at re-constructing the IEEE754 number, doing something similar
to the unit test code.

also, we need to work out the exceptions, NaN, Inf, etc.

You are receiving this mail because:
You are on the CC list for the bug.

More information about the libre-riscv-dev mailing list