[libre-riscv-dev] pinmux in nmigen

Hendrik Boom hendrik at topoi.pooq.com
Fri Apr 12 15:02:17 BST 2019

On Fri, Apr 12, 2019 at 01:59:28PM +0100, Luke Kenneth Casson Leighton wrote:
> On Fri, Apr 12, 2019 at 1:51 PM Rishabh Jain <rishucoding at gmail.com> wrote:
> >
> > one quick question: I checked this link:
> > https://www.crowdsupply.com/libre-risc-v/m-class while I was reading your
> > post on riscv hw-dev group. It says " With RISC-V being 40% more power
> > efficient than x86 or ARM...", an eye-opener
> > for me.
>  it's down to the use of compressed instructions, resulting in a
> reduction in cache size.

That makes sense.  But I thought RISC effificiency was originally 
attributed to simpler instruction decoding and simpler mapping of 
instructions to sets of actions.

> > can we put implementation of pinmux in nmigen as a big task for NLnet
> > foundation proposal?
>  yes, definitely.  with small subtasks as well.
> > we can discuss over breaking into milestons .. and have a rough timeline
> > for completion?
>  the last time it took... what... four to five months?

Four to five months to make the timeline?  Or to carry it out?

-- hendrik

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