[libre-riscv-dev] pipeline sync issues

Luke Kenneth Casson Leighton lkcl at lkcl.net
Fri Apr 12 11:14:57 BST 2019

Idea occurred to me that passing in stage=self in current ControlBase
derivative has the side-effect of giving the combined Control+Data
semantics that you describe, jacob.

In fact there are a couple of unit test examples that do exactly that,
except, actually, they derive from one of the derivatives rather than
ControlBase directly.

The problem with creating such a hybrid by deriving directly from
ControlBase is that the class itself then has to do precisely the
ready/valid signal handling that is causing us so much grief.

The d_valid and d_ready hooks are / were an experiment to help avoid having
to make such a mess.


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