[libre-riscv-dev] pinmux in nmigen
rishucoding at gmail.com
Wed Apr 3 18:09:22 BST 2019
I have started with migen. I found a good tutorial at
I am getting to like it :)
Now, I have a better understanding of migen.
I found there are some good examples in migen and nmigen repo. I am going
to check them soon.
I was wondering if there is any technical document on migen or nmigen
giving complete documentation about this library. are you aware of anything
I find migen similar to cocotb in the sense, we write the design logic in
high level abstract manner (FHDL).
I remember, we were using myHdl? So, may you give me some pointers on
choosing nmigen over it?
I haven't checked pinmux yet, but for starting writing modules in nmigen,
may you share thoughts on where can I begin?
On Mon, Mar 25, 2019 at 11:02 PM Luke Kenneth Casson Leighton <lkcl at lkcl.net>
> crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
> On Mon, Mar 25, 2019 at 4:13 PM Rishabh Jain <rishucoding at gmail.com>
> > Yes, i remember the first phase. We used to specify the specification,
> > pinout in a file in a tabular format.
> > Then, using python templates, we generated the bsv code. Then using
> > bluespec compiler, it automatically generated the
> > verilog code.
> yes. this time, with nmigen, i'd like to not have to actually
> auto-generate python code, rather, to write code that *is* python,
> > For this verilog RTL, we used to model the same design in python cocotb
> > test the functional correctness.
> yes. it was quite a lot of fun, i remember.
> > To begin, I shall experiment with some of the files to get my hands back
> > pinmux.
> > Can you give more insights on where nmigen will be useful?
> nmigen is libre, bluespec is not.
> > Earlier, bluespec used to generate verilog. But, nmigen can also generate
> > verilog (as we are doing in CAM).
> yes it can.
> > So, are you thinking to switch to nmigen and replace bsv?
> not replace, just leave it as-is. if the shakti group want to use it,
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