May 2022 Archives by author

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Starting: Tue May 3 08:12:20 BST 2022
Ending: Tue May 31 14:21:44 BST 2022
Messages: 31

• [Libre-soc-isa] [Bug 817] Big Integer Math (sv.adde, sv.subfe, sv.madded, 128 by 64-bit -> 64-bit div/rem, maybe more...)   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 817] Big Integer Math (sv.adde, sv.subfe, sv.madded, 128 by 64-bit -> 64-bit div/rem, maybe more...)   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 680] bpermd XLEN update needs refinement   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 817] Big Integer Math (sv.adde, sv.subfe, sv.madded, 128 by 64-bit -> 64-bit div/rem, maybe more...)   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 817] Big Integer Math (sv.adde, sv.subfe, sv.madded, 128 by 64-bit -> 64-bit div/rem, maybe more...)   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 817] Big Integer Math (sv.adde, sv.subfe, sv.madded, 128 by 64-bit -> 64-bit div/rem, maybe more...)   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 697] SVP64 Reduce Modes   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 697] SVP64 Reduce Modes   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 533] design new CR instructions suitable for predication   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 533] design new CR instructions suitable for predication   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 533] design new CR instructions suitable for predication   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 697] SVP64 Reduce Modes   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 817] Big Integer Math (sv.adde, sv.subfe, sv.madded, 128 by 64-bit -> 64-bit div/rem, maybe more...)   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 817] Big Integer Math (sv.adde, sv.subfe, sv.madded, 128 by 64-bit -> 64-bit div/rem, maybe more...)   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 650] write rfc for OpenPower fpr <-> gpr moves/conversions   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 650] write rfc for OpenPower fpr <-> gpr moves/conversions   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 650] write rfc for OpenPower fpr <-> gpr moves/conversions   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 650] write rfc for OpenPower fpr <-> gpr moves/conversions   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 650] write rfc for OpenPower fpr <-> gpr moves/conversions   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 650] write rfc for OpenPower fpr <-> gpr moves/conversions   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 650] write rfc for OpenPower fpr <-> gpr moves/conversions   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 650] write rfc for OpenPower fpr <-> gpr moves/conversions   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 664] design SVP64 branch instructions (sv.bc)   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 664] design SVP64 branch instructions (sv.bc)   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 664] design SVP64 branch instructions (sv.bc)   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 664] design SVP64 branch instructions (sv.bc)   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 842] New: add Tininess-After-Rounding floating point flag -- needed for x86 and risc-v compatibility.   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 664] design SVP64 branch instructions (sv.bc)   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 664] design SVP64 branch instructions (sv.bc)   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 664] design SVP64 branch instructions (sv.bc)   bugzilla-daemon at libre-soc.org
• [Libre-soc-isa] [Bug 664] design SVP64 branch instructions (sv.bc)   bugzilla-daemon at libre-soc.org

Last message date: Tue May 31 14:21:44 BST 2022
Archived on: Tue May 31 14:21:45 BST 2022

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