[Libre-soc-isa] [Bug 664] design SVP64 branch instructions (sv.bc)

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=664

--- Comment #11 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Luke Kenneth Casson Leighton from comment #10)

> surprisingly adding LSVR is not that gate-hungry.  it is completely
> independent, and already the branch instructions have a different RM
> Decode path,

there are 4 different decode paths where the 24-bit RM field is interpreted
differently: 1) arithmetic 2) CRs 3) LDST 4) branches. yes it is annoying that
partial decode of the suffix is required in order to begin decoding the
prefix but like in v3.1 prefix more bits woukd be required to provide the
type identification (MTRR, 8LS etc) and we would need to take yet another
major opcode to do it (26 bits needed)

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