[Libre-soc-isa] [Bug 533] design new CR instructions suitable for predication

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=533

--- Comment #12 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #11)

> do note that pmovmaskb actually copies 16 or 32 bits of MSBs to an integer
> register, rather than 1, 2, 4, or 8. (pmovmaskb technically has a version
> that does 8-bits, but nobody uses that anymore since the source is a MMX
> register -- shared with x87 registers in a painful manner)

the elwidth override on the source (which would be the CRs) is meaningless
and thus can be "repurposed".

by default however the single-bit result of testin each CR from
a vector of CRs will all go into the *one* integer register:

    for i in range(VL):
         GPR(RT)[i] = crrweird_test(CRfield[BA+i])

this is *very* different from normal SVP64 which would do:

    for i in range(VL):
         GPR(RT+i) = crrweird_test(CRfield[BA+i])

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