[Libre-soc-isa] [Bug 664] design SVP64 branch instructions (sv.bc)

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=664

--- Comment #4 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
i've added a mode LRu (Link Register Update) which only gets LR updated
if the branch condition succeeds.  actually there is also the option to
only set LR if the branch condition *fails*

however the reason for today's thought is inspired from "why does LR even
exist in the first place" and it is down to making function calls
and returns from function calls possible.

in core.py there were two pieces of info identified (3)

* PC
* MSR
* SVSTATE

these three are what get saved/restored on contextswitch, which
i mention because it helps mentally get a handle on the execution
context.

MSR is global and not involved in functions.  PC gets saved in LR on
function calls... but what about SVSTATE? that needs saving as well.
therefore, the idea is:

* to add an extra SPR, LSVR Link SVState Register
* to extend svp64-branches to include save/swap of SVSTATE
  into/from LSVR
* to utilise more bits from RM (some of RM.EXTRA) to add
  an equivalent of the LK field, for LSVR, and corresponding
  variant of LRu.

if not included then any function call or loop involving
SVP64 will have to perform explicit backups of SVSTATE (mtspr,
mfspr) which will get very tedious very quickly.  this starts
to matter a lot more in VerticalFirst Mode than in Horizontal
because there is the potential for calling functions from
within VerticalFirst loops.

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