[Libre-soc-isa] [Bug 664] design SVP64 branch instructions (sv.bc)

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=664

--- Comment #9 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #8)
> (In reply to Jacob Lifshay from comment #7)
> > imho adding sv context switching within a sv vertical loop is too complex.
> 
> my feeling here it's going to be attempted whether we like it or not.
> therefore, it's down to us to explore that space, in advance, and to
> make it a smooth rather than a rough ride.
> 
> if a lot of mfspr/mtspr instructions on SVSTATE have to be used, that's
> a rough ride.  mfspr SVSTATE bclr mtspr SVSTATE repeat repeat repeat repeat.

wait, so you mean a function call inside a sv vertical-first loop? hmm...

anyway:
imho we should limit SV vertical mode to just single loops, otherwise we'll
gain more features and end up with something that takes 500k gates just in the
sv decoder...we need to stop adding every feature we can think of to SV
otherwise x86 will look at us and be proud that their spec is *only* 5000
pages... (idk the real number, but you get the idea)

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