[Libre-soc-bugs] [Bug 917] pysvp64dis: support SVP64 disassembly

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=917

--- Comment #69 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Dmitry Selyutin from comment #67)
> BTW see how nice this BranchCTRVLSRM class is:
> 
> class BranchVLSRM(BranchBaseRM):
>     """branch: VLSET mode"""
>     VSb: BaseRM[7]
>     VLI: BaseRM[21]
> 
> class BranchCTRRM(BranchBaseRM):
>     """branch: CTR-test mode"""
>     CTi: BaseRM[6]
> 
> class BranchCTRVLSRM(BranchVLSRM, BranchCTRRM):
>     """branch: CTR-test+VLSET mode"""
>     pass

love it. "duh" level of simplicity.

(In reply to Dmitry Selyutin from comment #66)
> All branch modes are completed, including complex stuff like below:
> 
> sv.bc/vs/all/snz/sl/slu/lru 12,*1,0xc
> sv.bc/vsi/all/snz/sl/slu/lru 12,*1,0xc
> sv.bc/vsb/all/snz/sl/slu/lru 12,*1,0xc
> sv.bc/vsbi/all/snz/sl/slu/lru 12,*1,0xc
> sv.bc/ctr/all/snz/sl/slu/lru 12,*1,0xc
> sv.bc/cti/all/snz/sl/slu/lru 12,*1,0xc

almost-unavoidably-scarily-long! :) you can - ha ha - also have vs/ctr
vsbi/cti etc. etc.

should be able to get it down on
"sl/slu" by combining those into a 2-3-letter acronymn: sl,slu,SLu
or something.

also, /sz is another one to combine: /snz also means "/sz"
* /sz = bit 23=1, bit 5=0
* /snz = bit 23+5=1
* ILLEGAL bit 23=0, bit5 =1
* {nothing} bit 23=0,bit5=0

(In reply to Dmitry Selyutin from comment #68)
> Ah yeah one note on these patches. In pysvp64asm, there are some sections
> with `if not is_bc`. Eventually these should go down the drain, 

goooood.

-- 
You are receiving this mail because:
You are on the CC list for the bug.