[Libre-soc-bugs] [Bug 917] pysvp64dis: support SVP64 disassembly

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Tue Sep 20 02:11:00 BST 2022


https://bugs.libre-soc.org/show_bug.cgi?id=917

--- Comment #68 from Dmitry Selyutin <ghostmansd at gmail.com> ---
Ah yeah one note on these patches. In pysvp64asm, there are some sections with
`if not is_bc`. Eventually these should go down the drain, as well as hacking
around srcwid/dstwid, and be replaced by fields. I started with branches,
because I had to change this code to support all modes, but all modes should
eventually be switched to this fields-based method, since it closely follows
the spec, setting the individual fields. This is exactly how I want to do it in
binutils, both assembly and disassembly.

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