[Libre-soc-bugs] [Bug 506] 8x VDD VSS pins needed in ioring

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=506

--- Comment #15 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Staf Verhaegen from comment #13)
> (In reply to Luke Kenneth Casson Leighton from comment #11)

> > is that the case even if there are multiple IO 3.3v domains?
> 
> Yes.

ok.

> Typically this is done by sharing the ground between the different domains
> but allow the possibility to have different supply voltages.

ok.

> More details I
> don't have time to provide now.

no problem.

> > 
> > what if the power connection is not a ring, but is instead just a line?
> 
> Normally IO cells are arranged in a ring. In theory, you could reduce this
> to one line. You can't have multiple disconnected lines.

ok scratch that idea, i thought the distance for pads was not large enough for
ESD to jump.

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