[Libre-soc-bugs] [Bug 325] create POWER9 TRAP pipeline

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=325

--- Comment #119 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
On Wed, Jul 22, 2020 at 8:13 PM Samuel Falvo II <sam.falvo at gmail.com> wrote:
>
> I'm not suggesting you need to divert what you're working on.  I'm
> just going to take a break for a bit and meditate on what you've
> written.  I need to find (or develop for myself) tools (code,
> convention, or both) to prevent the massive proliferation of silly
> mistakes that I'm injecting.

sam: really, don't worry about it.  it's part of learning. you've identified
at least two bugs, one spec discrepancy, and more.  this is valuable!

plus, as you've probably noticed, i miss things (takes a couple of
repetitions and i eventually "get it") - for example you had to emphasise
twice about the register bitfields.  i got it in the end.

apparently, it's well-known in the POWER community that everyone dealing
with PowerISA goes through this "adaptation" phase to LE / BE.

now - and this is actually part of the Charter - what i am *not* going
to do is take away the opportunity for you to fix the errors that you
introduced: that's why i put code-comments (that were more lines to
write than if i'd "fixed" the things myself).

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