[Libre-soc-isa] [Bug 937] instructions for bigint shift and prefix-code encode

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Sat Oct 22 19:49:05 BST 2022


--- Comment #14 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
>            # shift then or-reduce:
>            out[-1] |= dshlsd(sym_bits[i], 0, cur_start)

if the intention here is to perform a type of vector-bitmask-merge-to-scalar
(or the inverse, extract-from-scalar-to-vector) i don't have a problem
with creating a special instruction for that although i feel it is important
to try *really hard* to find an existing instruction which might do the job.

the general idea being to have a vector of (offset,length)s to either
extract (or insert) bits (fields)

unfortunately i have a sneaking suspicion that VSX has something like this.

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