On Mon, Nov 16, 2020 at 9:35 AM Luke Kenneth Casson Leighton <lkcl at lkcl.net> wrote: > > cole how you getting on with your priority task to review the JTAG connections? > https://libre-soc.org/HDL_workflow/ECP5_FPGA/ Working on it right this moment. Any possibility of a call this week? Cole