[Libre-soc-dev] daily kan-ban update 26 aug 2020

[Luke Kenneth Casson Leighton]

On Wednesday, August 26, 2020, Cole Poirier <colepoirier at gmail.com> wrote:

I have no idea how to translate, i.e. vhdl generate statement, port
> maps,


these are just the parameters to the object.  anything identified as as
input you call object.input.eq(theinput) and anything as output you do
theoutput.eq(object.input)

of course some may be RecordObjects and here i typically create a function
called connect_to.

however the microwatt team you will see they subdivided into inputs and
outputs and grouped them together so you do not need to do that trick.

RecordObject.eq will do.

and generic maps.


the arrays of arrays, particularly the ones with types, you just have to
substitute one into the other then do that again *and* again.

you end up with a 2D array of signals.

the inner type is the bitwidth of the signal
the middle type is the inner array dimension.
the outer type is the outer areay dimension.

l.



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