[Libre-soc-dev] [OpenPOWER-HDL-Cores] bug in libre-soc "modsd" and possibly in microwatt as well

[Paul Mackerras]

On Sat, Aug 22, 2020 at 02:20:51PM +0100, Luke Kenneth Casson Leighton wrote:
> paul, mikey, ben: i am running a step-and-diff of the "1.bin" unit
> test, and ran into a discrepancy where none of the values match up for
> the following test:
> 
>         lst = [f"modsd 17, 27, 0"]
>         initial_regs = [0] * 32
>         initial_regs[0] = 0xff
>         initial_regs[27] = 0x7fffffffffffffff
> 
> this is the following instruction which can be found in 1.bin:
> 
>    103dc:   12 06 3b 7e     modsd   r17,r27,r0
> 
> the full dump can be found with the following command:
> lkcl at fizzy:~/src/libresoc/microwatt/tests$
> powerpc64le-linux-gnu-objdump --disassemble-zeroes -m powerpc -D -b
> binary -EL 1.bin > 1.dump
> 
> the results are as follows:
> 
> * our program instruction analyzer returns 0x7f
> * microwatt seems to return 0x1 (although there is "delay" in
> single-stepping which is causing problems)

I looked through the log of a simulation of microwatt running 1.bin.
I see a value of 0x7fffffff in r0 at that instruction, not 0xff.  (In
fact the 0x7fffffff is the value initially loaded into r0 at the
beginning of the instruction sequence.)

0x7fffffffffffffff mod 0x7fffffff is 1, which would be why microwatt
is putting 1 into r17.

Regards,
Paul.