[Libre-soc-bugs] [Bug 1044] SVP64 implementation of pow(x,y,z)

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1044

--- Comment #52 from Jacob Lifshay <programmerjake at gmail.com> ---
https://git.libre-soc.org/?p=openpower-isa.git;a=shortlog;h=5f0468b5f432804b8e6d201f2e38bdd52fdce612

commit 5f0468b5f432804b8e6d201f2e38bdd52fdce612
Author: Jacob Lifshay <programmerjake at gmail.com>
Date:   Tue Oct 10 22:07:17 2023 -0700

    WIP divmod: implemented division by single word

commit b43960a84efcb0386c07281961d439167ae8a3e7
Author: Jacob Lifshay <programmerjake at gmail.com>
Date:   Tue Oct 10 22:05:49 2023 -0700

    support ignoring integer registers for ExpectedState

commit 147e028182d01f9e3f698cdffef7d1442c8302ff
Author: Jacob Lifshay <programmerjake at gmail.com>
Date:   Tue Oct 10 22:03:38 2023 -0700

    convert assigned values to SVSHAPE when writing to SVSHAPE[0-3] SPRs

    this makes mtspr SVSHAPE0, reg properly maintain ISACaller invariants

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