[Libre-soc-bugs] [Bug 1072] implement fcvt/fmv instructions in ISACaller (ls006)

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1072

--- Comment #40 from Jacob Lifshay <programmerjake at gmail.com> ---
https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;h=066134b401fca5dac03a292703e805a9f87d59fa;hp=999c11ee9159222343945e3850b1e2c4a64a8623

commit 066134b401fca5dac03a292703e805a9f87d59fa
Author: Jacob Lifshay <programmerjake at gmail.com>
Date:   Tue May 30 01:00:01 2023 -0700

    add support for checking sprs and msr in unit tests

commit 8df546fc0a12f28b3b771a81d92f6e54a7d6a654
Author: Jacob Lifshay <programmerjake at gmail.com>
Date:   Tue May 30 00:50:42 2023 -0700

    use a different default MSR value for unit tests since 0 isn't a very
useful default

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