[Libre-soc-bugs] [Bug 1086] ls2 verilator sim - setting up chroot and documentation

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1086

--- Comment #7 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Andrey Miroshnikov from comment #6)
> After running through the setup scripts in the following order (after
> creating chroot and copying over the dev scripts):
> ./install-hdl-apt-reqs
> ./hdl-dev-repos
> ./hdl-tools-yosys
> ./nextpnr-xilinx-install
> 
> I was able to make the external Libre-SOC core.
> 
> Looking at the log of nextpnr-xilinx-install, I saw that antlr parser was
> not present. There's an automatic fallback to textX parser, but I haven't
> tested this software (not working on FPGA yet).

as long as it "works" it's good.

> After running hdl-dev-ls2, I noticed the following in the log:
> 
> - The nmigen got overwritten (was at nmigen 0.1.dev1205+g29dec30, which
> isn't good, given that we needed 0.2). 

remember i mentioned about pip3 performing tasks without consent and
without informing you?

so that is almost certainly this line:

  28         "nmigen>=0.1,<0.5",

https://git.libre-soc.org/?p=lambdasoc.git;a=blob;f=setup.py;h=2fca63720db579d4f7e14584d3c84c0a1e7bbd05;hb=HEAD

for now just comment all of these out:

  28         "nmigen>=0.1,<0.5",
  29         "nmigen-soc",
  30         "nmigen-stdio",
  31         "nmigen-boards",

and also these:

  34     install_requires=['nmigen', 'nmigen_boards'],

https://git.libre-soc.org/?p=gram.git;a=blob;f=setup.py;h=2243981d2c1c298e0ba8750a425bf5ed9bf32aff;hb=0b606145a2febf3ea93a5f345a316a147f74ac73

you'll then need to re-run the entire lot again. patience needed, yes
it's an O(N^2) process.

-- 
You are receiving this mail because:
You are on the CC list for the bug.