[Libre-soc-bugs] [Bug 1035] Implement Scalar Power ISA v3.1 instructions in ISACaller

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1035

--- Comment #6 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Luke Kenneth Casson Leighton from comment #1)
> instructions (note, these are all Scalar and they are UnVectoriseable)
> 
> * prefixed ld/store immediate byte thru quad
>    plbz plhz plha plwz plwa pld plq
>    pstb psth pstw pstd pstq
>    plfs plfd pstfs pstfd
> * paddi
> * pnop - prefixed nop
> * prefixed FP load/store immediate

all of these according to Public v3.1 p23 Section 1.6.3-4 Book I
are strictly Immediate-only operands.  the only reg operands
are MSK and those are unused by the above instructions.

therefore - and this is the important bit - the above instructions
do *not* have or require different register profiles from their
unprefixed counterparts.

all they need is extra immediate fields, and immediates are *not*
part of *register* profiles.

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