[Libre-soc-bugs] [Bug 1035] Implement Scalar Power ISA v3.1 instructions in ISACaller

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1035

--- Comment #5 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #3)
> (In reply to Luke Kenneth Casson Leighton from comment #1)

> > * cfuge, pextd, pdepd
> > * brh brw brd - these are actually all covered by grevlut
> > * setbc, setbcr, setnbc etc.
> 
> these are vectorizable

missed that, good catch, edited comment #1 to match.
reg profiles:

* p105 cntlzdm cnttzdm cfuged pextd pdepd RA,RS,RB X-Form
* p119 brh brw brd RA,RS X-Form
* p129 setbc setbcr setnbc setnbcr RT,BI X-Form

these are:

* GPR 2R GPR 1W
* GPR 1R GPR 1W
* CR  1R GPR 1W

none of these 3 groups alter anything else, no XER or PC or SPRs.

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