[Libre-soc-bugs] [Bug 1072] implement fcvt/fmv instructions in ISACaller (ls006)

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Wed May 10 09:52:34 BST 2023


--- Comment #19 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Jacob Lifshay from comment #18)
> bit 0 is the first fractional bit, since that is
> what the PowerISA spec expects.

actually bit 0 is the lsb integer bit, bit 1 is the first fractional
bit...adding a todo to fix that.

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