[Libre-soc-bugs] [Bug 917] pysvp64dis: support SVP64 disassembly
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Tue Sep 13 20:46:02 BST 2022
https://bugs.libre-soc.org/show_bug.cgi?id=917
--- Comment #50 from Dmitry Selyutin <ghostmansd at gmail.com> ---
Is it the recent version?
======================================================================
FAIL: test_7_batch (__main__.SVSTATETestCase) [26:mtspr]
these come from https://bugs.libre-soc.org/show_bug.cgi?id=917#c25
----------------------------------------------------------------------
Traceback (most recent call last):
File "src/openpower/sv/trans/test_pysvp64dis.py", line 27, in _do_tst
"'%s' expected '%s'" % (line, expected[i]))
AssertionError: 'mtspr 288,0' != 'mtspr 9,0'
- mtspr 288,0
? ^^^
+ mtspr 9,0
? ^
: instruction does not match 'mtspr 9,0' expected 'mtspr 288,0'
----------------------------------------------------------------------
Ran 8 tests in 18.859s
FAILED (failures=1, errors=1)
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