[Libre-soc-bugs] [Bug 917] pysvp64dis: support SVP64 disassembly

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=917

--- Comment #37 from Dmitry Selyutin <ghostmansd at gmail.com> ---
Today's achievements:
1. Fixed Rc-enabled instructions (the matching algorithm was incorrect).
2. Refactored RM mappings so that these can be different depending on the mode
(needed for CR ops and branches, probably others).
3. Supported multiple opcodes for binutils (not yet tested, but on the first
glance looks fine).

Below is how it looks in C.

struct svp64_opcode {
  uint32_t value;
  uint32_t mask;
};

struct svp64_record {
  const char *name;
  struct svp64_desc desc;
  const struct svp64_opcode *opcodes;
  size_t nr_opcodes;
};

const struct svp64_opcode svp64_opcodes[] = \
{
  {
    .value = 0x7c0004ae,
    .mask = 0xfc0007fe,
  },
  /* snip */
}

const struct svp64_record svp64_records[] = \
{
  /* snip */
  {
    .name = "sv.isel",
    .desc = {
      .function = SVP64_FUNCTION_CR,
      .in1 = SVP64_IN1_SEL_RA_OR_ZERO,
      .in2 = SVP64_IN2_SEL_RB,
      .in3 = SVP64_IN3_SEL_NONE,
      .out = SVP64_OUT_SEL_RT,
      .out2 = SVP64_OUT_SEL_RT,
      .cr_in = SVP64_CR_IN_SEL_BC,
      .cr_in2 = SVP64_CR_IN2_SEL_NONE,
      .cr_out = SVP64_CR_OUT_SEL_NONE,
      .ptype = SVP64_PTYPE_P1,
      .etype = SVP64_ETYPE_EXTRA2,
      .extra_idx_in1 = SVP64_EXTRA_IDX1,
      .extra_idx_in2 = SVP64_EXTRA_IDX2,
      .extra_idx_in3 = SVP64_EXTRA_NONE,
      .extra_idx_out = SVP64_EXTRA_IDX0,
      .extra_idx_out2 = SVP64_EXTRA_NONE,
      .extra_idx_cr_in = SVP64_EXTRA_IDX3,
      .extra_idx_cr_out = SVP64_EXTRA_NONE,
    },
    .opcodes = &svp64_opcodes[288],
    .nr_opcodes = 32,
  },
  /* snip */
}

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