[Libre-soc-bugs] [Bug 724] Determine required memory compiler developments

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=724

--- Comment #22 from Staf Verhaegen <staf at fibraservi.eu> ---
(In reply to Staf Verhaegen from comment #21)
> (In reply to Luke Kenneth Casson Leighton from comment #20)
> > No, the dual port SRAM uses an 8T cell.
> 
> ah brilliant so definitely 1R1W, which is fantastic.

No actually 2RW :)

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