[Libre-soc-bugs] [Bug 887] implement fmvis and 2nd-half variant

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=887

--- Comment #8 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
1.6.1.6 DX-FORM
0  6  11 16 26 31 
PO RT d1 d0 XO d2
Figure 8. DX instruction format

just checking PDF Power ISA v3.1 this does not match with
the changes you made.  check fields.text

https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;h=04f20aaff9ad03410dd7c6f483a50c754667f99c

     # V3.0B 1.6.6 DX-FORM
     # |0     |6 |7|8|9  |10  |11|12|13  |15|16|17     |26|27    |31  |
-    # | PO   |   FRS         |     d1      |      d0     |   XO |d2  |
+    # | PO   |   FRS         |     d1      |      d0  |      XO |d2  |

that doesn't match the spec. something else is going on.
https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=openpower/isatables/fields.text;h=7037463cda1e0c4372aa1cb491e281039223f611;hb=d64bf3662989d5f04da0657e154ccea5124e2872

 51 # V3.0B 1.6.6 DX-FORM
  52     |0    |6   |11   |16   |26   |31
  53     | PO  |  RT|   d1|   d0|   XO|d2
  54     | PO  | FRS|   d1|   d0|   XO|d2

that matches the PDF.  don't for goodness sake modify fields.text

what the heck is going on.

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