[Libre-soc-bugs] [Bug 855] add libre-soc to kestrel

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Tue Jul 5 21:13:41 BST 2022


https://bugs.libre-soc.org/show_bug.cgi?id=855

--- Comment #31 from tpearson at raptorengineering.com ---
One other little bonus...

--=============== SoC ==================--
                           vvvvv
CPU:            LibreSoC @ 60MHz
                           ^^^^^
BUS:            WISHBONE 32-bit @ 4GiB
CSR:            8-bit data
ROM:            52KiB
SRAM:           8KiB
L2:             8KiB
SDRAM:          1048576KiB 32-bit @ 240MT/s (CL-6 CWL-5)

<snip>

Memspeed at 0x00000040000000 (2MiB)...
               vvvvvvvv
  Write speed: 15MiB/s
   Read speed: 14MiB/s
               ^^^^^^^^

<snip>

--- 8 messages dropped ---
[00:00:04.071,476] <inf> spi_nor: PH1: ff84 rev 0.128: 14529 DW @ 4009c224
[00:00:04.071,609] <inf> spi_tercel: Tercel SPI controller frequency configured
to 4 MHz (bus frequency 10 MHz, dummy cycles 41153)

[00:00:04.072,275] <inf> spi_nor: bmc: SFDP v 1.255 AP 3a732502 with 544612432
PH
[00:00:04.072,335] <inf> spi_nor: PH0: ff00 rev 6.48: 26817 DW @ 4009c220
[00:00:04.073,105] <inf> spi_nor: bmc: 64 MiBy flash
[00:00:04.073,443] <inf> spi_nor: PH1: ff84 rev 0.128: 14529 DW @ 4009c224
[00:00:04.073,608] <inf> spi_tercel: Tercel SPI controller frequency configured
to 4 MHz (bus frequency 10 MHz, dummy cycles 0)

[00:00:04.074,247] <inf> spi_nor: H
[00:00:04.074,360] <inf> spi_nor: PH0: ff00 rev 6.48: 27329 DW @ 4009c220
[00:00:04.075,077] <inf> spi_nor: fpga: 16 MiBy flash
[00:00:04.075,182] <inf> spi_nor: PH1: ff84 rev 0.128: 8385 DW @ 4009c214
[00:00:04.104,709] <inf> shell_telnet: Telnet shell backend initialized
[00:00:04.112,128] <inf> net_config: Initializing network
[00:00:04.112,661] <inf> net_config: IPv4 address: 192.168.1.80
[00:00:04.113,082] <inf> net_config: Running dhcpv4 client...
uart:~$ Area 2 at 0xc00000 on bmc for 4194304 bytes
FAIL: mount id 2 at /lfs: -28
Raptor Aquila LPC slave found, device version 1.0.0Raptor Tercel SPI master
found, device version 1.0.0Flash controller frequency configured to 15 MHz (bus
frequency 60 MHz, dummy cycles 10)FPGA SPI flash ID: 0x20ba1810Raptor Tercel
SPI master found, device version 1.0.0Micron N25Q 512Mb Flash device detected,
configuringFlash controller frequency configured to 5 MHz (bus frequency 60
MHz, dummy cycles 10)BMC SPI flash ID: 0x20ba2010Raptor Tercel SPI master
found, device version 1.0.0Micron N25Q 512Mb Flash device detected,
configuringFlash controller frequency configured to 5 MHz (bus frequency 60
MHz, dummy cycles 10)Host SPI flash ID: 0x20ba2010
FSP0>

Pretty good speed bump in Web page load just with that change to the core
clock.

Who wants Arctic Tern modules? ;)

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