[Libre-soc-bugs] [Bug 855] add libre-soc to kestrel
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Tue Jul 5 14:04:48 BST 2022
https://bugs.libre-soc.org/show_bug.cgi?id=855
--- Comment #22 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
def case_kestrel_regression_0(self):
lst = ["mulhd r30,r9,r30"]
initial_regs = [0] * 32
initial_regs[30] = 0x20c49ba5e353f7cf
initial_regs[9] = 0x1f40
e = ExpectedState(initial_regs, 4)
e.intregs[30] = 0x400
self.add_case(Program(lst, bigendian), initial_regs, expected=e)
expected value according to the ISACaller Simulator is 0x400
i'm going to go with that and see what TestIssuer does.
https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;h=fdeeb295ae18191d5702e7acd8f940a1aeb2977b
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