[Libre-soc-bugs] [Bug 517] Define JTAG pins and set up with litex for ulx3s85f

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=517

--- Comment #38 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Cole Poirier from comment #37)
> Created attachment 114 [details]
> STLINKV2 JTAG wires
> 
> Luke, this is the image of the jtag jumper wires from the above FPGA JTAG
> wires image, connected to the STLINKV2 pins

so now include the colours in the table on comment #0

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