[Libre-soc-bugs] [Bug 517] Define JTAG pins and set up with litex for ulx3s85f

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=517

--- Comment #36 from Cole Poirier <colepoirier at gmail.com> ---
Created attachment 113
  --> https://bugs.libre-soc.org/attachment.cgi?id=113&action=edit
FPGA JTAG wires

Luke this is the image of the jumpers connected to the FPGA header pins

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