[Libre-soc-bugs] [Bug 506] 8x VDD VSS pins needed in ioring

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=506

--- Comment #17 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
got bored, decided to add the option:
https://gitlab.lip6.fr/vlsi-eda/coriolis/-/issues/29

you'll need to review that, jean-paul, i tend to add random print
statements in to check what is going on.

i also disabled the "error" which prevents pads from being added
beyond the edge of the core.  *with care* there should be no overlap.

it would be better to be able to specify that the IOpads start *exactly*
from the width of the core *NOT* from the width of the corona:

+------|-|-|-------+
       | | |
      +|-|-|+
      |     |
      -     -

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