[Libre-soc-bugs] [Bug 506] 8x VDD VSS pins needed in ioring

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=506

--- Comment #11 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Staf Verhaegen from comment #9)

> FYI, my IO cell library currently won't support different power domains.
> Although implementation may seem trivial it actually is not. Thing is that
> you may not fully isolate the domains because then you get ESD problems
> between pins of different voltage domain.

is that the case even if there are multiple IO 3.3v domains?

is that related to how close the 3.3v IO power rings are to each other?

what if the power connection is not a ring, but is instead just a line?

it does not make a lot of sense to have 8 or 16 GPIOs, for a "ring" to go
round the entire chip, when the IOpads for GPIO - and its VSS/VDD - are
isolated to one small section.

N20-N29 for example are VDD_GPIO GPIO0..7 VSS_GPIO

lines would be separated by much greater distance because the pads
have a huge distance, and therefore each different voltage domain would
in fact be hugely separated.

(except 1.8v VDDI/VSSI of course which would still remain a ring)


> So the prototype will have on 3.3V domain and one 1.8V domain.

questions:

* are we using pxlib (alliance, original) or the C4M alternative?  if
  jean-paul has to redesign the coriolis plugin to suit the C4M replacement
  (and it has a different API - not the same ck mappings) we should discuss
  that, work out how much time it takes.

* if you have to adapt the C4M alternative to suit the (exact) API of the
  (original, alliance) pxlib, how long will this take and can it be done
  in time?

* can we even use the (original, alliance) pxlib for this prototype?
  (alliance pxlib _is_ silicon-proven @ 180nm, is it not?)

* can the (original, alliance) pxlib handle ESD for multiple 3.3v domains?

  i.e. is the ESD problem unique to C4M alternative pxlib or is it a
  general problem for *all* IO pad libraries?

* can "lines" instead of "rings" solve the ESD isolation between different
  3.3v domains?

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