[Libre-soc-bugs] [Bug 325] create POWER9 TRAP pipeline

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=325

--- Comment #122 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
                 # check EE (48) IR (58), DR (59): PR (49) will over-ride
-                comb += [
-                    Assert(msr_o[48] == (srr1_i[48] | srr1_i[48])), # EE
-                    Assert(msr_o[58] == (srr1_i[58] | srr1_i[58])), # IR
-                    Assert(msr_o[59] == (srr1_i[59] | srr1_i[59])), # DR
-                ]
+                for bit in [48, 58, 59]:
+                    comb += Assert(
+                        field(msr_o, bit) ==
+                        (field(srr1_i, bit) | field(srr1_i, 49))
+                    )


i appreciate where you're coming from, here, creating a loop.  however because
it is only 3 items it saves zero lines of code, and actually looks less
elegant.

in addition, the purpose here is to *literally* allow a reader to line-by-line,
side-by-side, no "thought" required, compare the proof against the pseudocode.

the loop actively goes against being able to do that, doesn't it?

that extra thought step of having to "interpret" the loop *could* be a missed
review of a mistake, and is extra mental effort.

so, on balance, revert this one.

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