[Libre-soc-bugs] [Bug 324] create POWER DIV pipeline

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=324

--- Comment #58 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #57)

> I manually entered the output regs for each instruction, 

ah no problem.  well it is eyes-on, anyway

> so I'm much more
> likely to have accidentally missed an output than if you use the csv files
> we derived from a working core.

the csv files came from microwatt decode1.vhdl - they don't quite contain
the level of detail we need in all cases.

commit 5a5fbe7f8de03420334049c1b305c3eff46adde7 (HEAD -> master)
Author: Luke Kenneth Casson Leighton <lkcl at lkcl.net>
Date:   Thu Jul 9 10:32:57 2020 +0100

    create new DivMulOutputData which does not have CA/CA32

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