[Libre-soc-dev] Fwd: Re: NGI POINTER gigabit ethernet router ASIC roadmap

Staf Verhaegen (FibraServi) staf at fibraservi.eu
Tue Nov 2 15:10:29 GMT 2021

Op 1/11/2021 om 15:51 schreef lkcl:
>> also, very important: the USB3300 *must* supply its own 1.8v VREF for the Digital
>> IO.  i realise that this means 3 Power Rails.  if that is a problem then we find a
>> different PHY *or* on the PCB have a Level-Shifter IO IC, 60 mhz is not difficult to
>> do.
>    I think this is more a question for Staf first. The power routing inside the
>    I/O pad is mainly defined by the I/O pad cells layout.

AFAICS 1.8V is only generated for internal use on the USB3300 and the 
ULPI IO are 3.3V CMOS IO and the 3.3V supply of the USB3300 may be 
shared with 3.3V IO supply of the router ASIC.

On PCB design you need to add capacitors on the 1.8V of the USB3300 as 
you can't have big enough on chip capacitances.


Chips want to be free.

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