[Libre-soc-dev] Fwd: Re: NGI POINTER gigabit ethernet router ASIC roadmap
luke.leighton at gmail.com
Tue Nov 2 19:35:54 GMT 2021
On November 2, 2021 3:10:29 PM UTC, "Staf Verhaegen (FibraServi)" <staf at fibraservi.eu> wrote:
>AFAICS 1.8V is only generated for internal use on the USB3300 and the
>ULPI IO are 3.3V CMOS IO and the 3.3V supply of the USB3300 may be
>shared with 3.3V IO supply of the router ASIC.
ahh nice, i missed that. must go over it again. that is much better.
>On PCB design you need to add capacitors on the 1.8V of the USB3300 as
>you can't have big enough on chip capacitances.
this sounds normal from doing PCB design, often had to put a pair of 0.1uF and a 1/4.7/10uF as close to VSS/VDD as possible, the 0.1uF to suppress high-frequency transients.
More information about the Libre-soc-dev