[Libre-soc-dev] PLL integration

[Luke Kenneth Casson Leighton]

On Monday, May 24, 2021, Jean-Paul Chaput <Jean-Paul.Chaput at lip6.fr> wrote:

>
> Yes... In my wrapper I did rename it automatically into "out_v".
>
> I add "_v" to any VHDL keyword used as identifier.
> I would prefer to keep, as much as possible, to stick to the original
> names because they match the ones of the GDSII supplied by Dimitri.


except, the name is "out" in the GDSII file.

therefore the wrapper creates the wrong name (v_out)

therefore it is impossible to join up the nets because there is no way to
connect out_v to out.

l.




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