[Libre-soc-isa] [Bug 1161] EXTRA2/3 algorithm likely inconsistent with EXTRA2 tables causing PowerDecoder2 and insndb to disagree on scalar EXTRA2 register encoding for >=r32

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1161

Andrey Miroshnikov <andrey at technepisteme.xyz> changed:

           What    |Removed                     |Added
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                 CC|                            |andrey at technepisteme.xyz

--- Comment #10 from Andrey Miroshnikov <andrey at technepisteme.xyz> ---
(In reply to Jacob Lifshay from comment #9)
> 
> what do you think? I'll update the rest after getting your ok.

Please confirm you have checked Jacob's work and dis/approve.

> 
> https://git.libre-soc.org/?p=libreriscv.git;a=blob;f=openpower/sv/svp64.mdwn;
> h=f5b9e9ef340a6861630deb8848ac5ef72f6793fc;
> hb=ac4a9288f342e451fa4dbcab7db3321e8a14d9c7#l1192
> 
> now that I'm looking a bit more, I think we should use the syntax used by
> PowerISA's pseudocode, so it needs a bit more adjustment.

Although we want to be more aligned with the PowerISA spec, let's keep
priorities straight.

Right now, this task *must* be completed first (to make sure spec and simulator
are sync'd up) with the current pseudocode syntax (make no other
modifications). In the future (probably in a new grant), we can allocate budget
for tasks related to making our spec more consistent with OPF's.

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