[Libre-soc-isa] [Bug 937] instructions for bigint shift and prefix-code encode

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Fri Oct 28 01:11:28 BST 2022


--- Comment #20 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #19)
> (In reply to Jacob Lifshay from comment #18)
> > imho it's not quite right yet, since we have the carrying version, the
> > bigint tests need to be:
> > sv.dsld *16, *16, 3, 4  # just like sv.maddedu, but shifting
> > sv.dsrd/mrr *16, *16, 3, 4  # just like sv.divmod2du, but shifting
> with even-numbered RB, yes

no, RB and RC are scalar, they can be odd numbered.

> > afaict RS needs to be the lsb bits and RT the msb bits for dsrd,
> likely fixed by above, can you confirm?

i meant that needed to be changed in the unit tests. I fixed the unit tests,
and replaced scalar RB, RC regs with r3, r5:
(sorry, i just realized i forgot to split out formatting code as a separate

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