[Libre-soc-isa] [Bug 937] instructions for bigint shift and prefix-code encode

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Thu Oct 27 17:17:06 BST 2022


https://bugs.libre-soc.org/show_bug.cgi?id=937

--- Comment #18 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #17)
> got them working with a 128-bit ROTL, there's a way i know
> to do it without but i can't quite work it out.  at least
> it's functional.

imho it's not quite right yet, since we have the carrying version, the bigint
tests need to be:
# don't use r1, it's the stack pointer
sv.dsld *16, *16, 3, 4  # just like sv.maddedu, but shifting
sv.dsrd/mrr *16, *16, 3, 4  # just like sv.divmod2du, but shifting

also try signed right shift, where r4 is initialized to repl(msb, 64):
sradi 4, 18, 63
sv.dsrd/mrr *16, *16, 3, 4

afaict RS needs to be the lsb bits and RT the msb bits for dsrd, because if you
think about it, RS is the carry -- the bits shifted out of the result, those
bits are shifted right so are at the lsb end.

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