[Libre-soc-isa] [Bug 940] New: SVP64 LD/ST auto-increment mode (working with LDST-update)
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Mon Oct 3 17:16:20 BST 2022
https://bugs.libre-soc.org/show_bug.cgi?id=940
Bug ID: 940
Summary: SVP64 LD/ST auto-increment mode (working with
LDST-update)
Product: Libre-SOC's first SoC
Version: unspecified
Hardware: Other
OS: Linux
Status: CONFIRMED
Severity: enhancement
Priority: ---
Component: Specification
Assignee: lkcl at lkcl.net
Reporter: lkcl at lkcl.net
CC: libre-soc-isa at lists.libre-soc.org
NLnet milestone: ---
the 68000 PDP8 PDP11 and 6600 all had auto-increment addressing modes.
Power ISA has LDST-with-update which is not quite the same but almost:
update-with-immediate on a Vector advances by the immediate, but has
an initial "one too many adds"
autoincrementing should use the EA *before* the add is performed
(i.e. just RA) as an option. thus on loop exit RA is set to
point to where the *next* batch starts.
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