[Libre-soc-isa] [Bug 697] SVP64 Reduce Modes

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=697

--- Comment #26 from Jacob Lifshay <programmerjake at gmail.com> ---
added python generator for tree-reduce with remap (passed in as a dict or
something else indexable)

https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;h=2fe0ce6285864927127d8226171c566886b87e89

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