[Libre-soc-isa] [Bug 697] SVP64 Reduce Modes

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=697

--- Comment #18 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #4)

> 0    1    2    3    4    5    6    7
> |    |    |    |    |    |    |    |
> @----|----|----|----/    |    |    |
> |    @----|----|---------/    |    | distance=4
> |    |    @----|--------------/    |
> |    |    |    @-------------------/
> |    |    |    |
> @----|----/    | distance=2
> |    @---------/
> |    |
> @----/ distance=1
> |
> 
> the original (current SimpleV) reduce goes distance=1,2,4...
> 
> 0    1    2    3    4    5    6    7
> |    |    |    |    |    |    |    |
> @----/    @----/    @----/    @----/ distance=1
> |    .    |    .    |    .    |
> @---------/    .    @---------/ distance=2
> |    .    .    .    |
> @-------------------/ distance=4
> |

once converted to REMAP Form there are plenty of bits available
that will not only allow the step to go 1 2 4 8 instead of 8 4 2 1
but also to invert the order of the inner loop as well, such that
the reduction result ends up in the *last* element not the first.

(again this is already done in DCT/FFT REMAP, for iDCT and iFFT)

the current SVP64 RM Mode fields can then become a shortcut for setting
up the most popular reduction REMAPs

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