[Libre-soc-isa] [Bug 615] talk to binutils and gcc developers about acceptable sv assembly format

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=615

--- Comment #9 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #6)
> (In reply to Luke Kenneth Casson Leighton from comment #5)
> >    4.v(r3)
> 
> I'd say this is waay less clear...

there does exist an alternative which is to have the ld/st be qualified
with a mode.  i thiiink... no i haven't put LD/ST modes into SVP64Asm yet
so can't point you at it.

example (made up):

    svld/els/ew=8  RS, D(RA)

this says "els for element-strided)" and the hw knows to deploy this:

    for i in range(VL)
         # element-strided - the very unclear D.v(RA)
         Effective_Address = (i * D) + GPR[RA]

not:

    for i in range(VL)
         # unit strided
         Effective_Address = D + (i * elwidth) + GPR[RA]

-- 
You are receiving this mail because:
You are on the CC list for the bug.