[Libre-soc-isa] [Bug 615] talk to binutils and gcc developers about acceptable sv assembly format

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=615

--- Comment #10 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
also in conversation with Segher i suggested the prefixing of reg names

    "vr0" --> Vector-augmented r0
    "vf0" --> Vector-augmented f0

unfortunately he said that "vrNN" is already taken (an alias for vsrNN)

however now that i think about it, given that SV applies to *scalar* operations
only there's no actual conflict, there.

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