[Libre-soc-isa] [Bug 213] SimpleV Standard writeup needed

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Sun Jan 17 21:27:07 GMT 2021


https://bugs.libre-soc.org/show_bug.cgi?id=213

--- Comment #113 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #112)
> (In reply to Luke Kenneth Casson Leighton from comment #111)
> > https://libre-soc.org/openpower/sv/svp64/appendix/
> > 
> > it just occurred to me that we actually need two different kinds of
> > reduction:
> > 
> > * scalar accumulator O(VL)
> 
> assuming you mean serial reduction, where none of the per-element operations
> can be run in parallel (except for a few special cases).

ah good point.  MIN/MAX, XOR, OR, AND are definitely paralleliseable (into an
accumulator), probably MUL and ADD as well.  things like SUB, DIV, those are a
little weird.

> > * vector tree-based map-reduce O(VL log VL)
> 
> parallel reduction

yep nice point, noted.

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