[Libre-soc-dev] beginning adding subvl looping to ISACaller
luke.leighton at gmail.com
Tue Jul 19 20:00:32 BST 2022
first cut did not cause "damage" i.e. once added as long as subvl=0 (vec1 i.e. no subvecs) everything remains fine.
i attempted a unit test with vec2 and it immediately brought up a "dumb" moment - SVSTATE has a subvl field *and* 24-bit RM of the prefix has a subvl field!
i feel so stoopid.
there is a need for 2 more bits in SVSTATE (a separate dest-subvl-loop-counter) so SVSTATE.subvl can be removed and replaced with SVSTATE.dsubstep.
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